IBIS (Input/Output Buffer Information Specification) is a method of modeling circuits for functional or signal integrity analysis. SPICE models contain transistor-level information, whereas IBIS models are behavioral models consisting of tables that specify current/voltage (I/V), voltage/time (V/T), and parasitic behavior at each pin. IBIS models are generally less accurate than SPICE models but are usually faster and allow vendors to avoid divulging proprietary information about designs.
In Xpedition® AMS, IBIS models can be mapped to symbols so that simulations can account for real-world and parasitic effects. These simulations can be used to verify that the functional behavior of the circuit is acceptable when these effects are introduced.
At the end of this Support Kit, you will be able to assign IBIS models to components in the schematic and simulate them using Xpedition® AMS to verify functional behavior.
Estimated Time to Complete: 30-45 minutes
Version Information: Xpedition AMS VX.2.13